CohereSim: A Bus-based Cache Simulator
v3.3
A tool for education in computing - learn about coherence protocols, replacement policies, and SMP vs DSM
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Implementation of the InteractiveModeCoherence and BusEvent classes. More...
Macros | |
#define | ALLOCATED 0x55555555 |
Dummy tag value indicating that a line is allocated. | |
Enumerations | |
enum | col_width_e { COL_WIDTH_OP = 2 , COL_WIDTH_EVENT = 16 , COL_WIDTH_SOURCE = 11 , COL_WIDTH_STATES = 3 * N_INTERACTIVE_MODE_LINES - 1 , COL_WIDTH_ACCESS = 8 , COL_WIDTH_VICTIM = 6 , COL_WIDTH_TAGS = 2 * N_INTERACTIVE_MODE_LINES - 1 , COL_WIDTH_REP_STATE = 15 } |
Table column widths. More... | |
Variables | |
constexpr const char * | state_names [] |
String names of the states in state_e. More... | |
constexpr const char * | bus_event_names [] |
String names of bus messages and statistics in bus_msg_e and statistic_e. More... | |
Implementation of the InteractiveModeCoherence and BusEvent classes.
enum col_width_e |
Table column widths.
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constexpr |
String names of bus messages and statistics in bus_msg_e and statistic_e.
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constexpr |
String names of the states in state_e.