CohereSim: A Bus-based Cache Simulator  v3.3
A tool for education in computing - learn about coherence protocols, replacement policies, and SMP vs DSM
Public Member Functions | Protected Attributes
CoherenceProtocol Class Referenceabstract

The base class for coherence protocols. More...

#include <coherence_protocol.h>

Inheritance diagram for CoherenceProtocol:
Inheritance graph
[legend]
Collaboration diagram for CoherenceProtocol:
Collaboration graph
[legend]

Public Member Functions

 CoherenceProtocol (CacheABC &cache)
 Construct a new coherence protocol. More...
 
virtual void PrRd (cache_line *line)=0
 Receive a PrRd message. More...
 
virtual void PrWr (cache_line *line)=0
 Receive a PrWr message. More...
 
virtual bool BusRd (cache_line *line)=0
 Receive a BusRd message. More...
 
virtual bool BusRdX (cache_line *line)
 Receive a BusRdX message. More...
 
virtual bool BusUpdt (cache_line *line)
 Receive a BusUpdt message. More...
 
virtual bool BusUpgr (cache_line *line)
 Receive a BusUpgr message. More...
 
virtual bool BusWr (cache_line *line)
 Receive a BusWr message. More...
 
virtual bool doesDirtySharing ()
 Determine whether the coherence protocol does dirty sharing. More...
 
virtual bool doesWriteNoAllocate ()
 Determine whether the coherence protocol uses write no-allocate. More...
 
virtual bool isWriteBackNeeded (state_e state)=0
 Determine whether a line needs to be written back to main memory. More...
 

Protected Attributes

CacheABCcache
 The parent cache.
 

Detailed Description

The base class for coherence protocols.

Constructor & Destructor Documentation

◆ CoherenceProtocol()

CoherenceProtocol::CoherenceProtocol ( CacheABC cache)
inline

Construct a new coherence protocol.

Parameters
cacheThe parent cache

Member Function Documentation

◆ BusRd()

virtual bool CoherenceProtocol::BusRd ( cache_line line)
pure virtual

Receive a BusRd message.

Parameters
lineThe cache line accessed
Returns
True if the line was flushed to the bus

Implemented in WriteThrough, MSIUpgr, MSI, MOSI, MOESI, MESI, and Dragon.

◆ BusRdX()

virtual bool CoherenceProtocol::BusRdX ( cache_line line)
inlinevirtual

Receive a BusRdX message.

Parameters
lineThe cache line accessed
Returns
True if the line was flushed to the bus

Reimplemented in MSIUpgr, MSI, MOSI, MOESI, and MESI.

◆ BusUpdt()

virtual bool CoherenceProtocol::BusUpdt ( cache_line line)
inlinevirtual

Receive a BusUpdt message.

Parameters
lineThe cache line accessed
Returns
True if the line was flushed to the bus

Reimplemented in Dragon.

◆ BusUpgr()

virtual bool CoherenceProtocol::BusUpgr ( cache_line line)
inlinevirtual

Receive a BusUpgr message.

Parameters
lineThe cache line accessed
Returns
True if the line was flushed to the bus

Reimplemented in MSIUpgr, MOSI, MOESI, and MESI.

◆ BusWr()

virtual bool CoherenceProtocol::BusWr ( cache_line line)
inlinevirtual

Receive a BusWr message.

Parameters
lineThe cache line accessed
Returns
True if the line was flushed to the bus

Reimplemented in WriteThrough.

◆ doesDirtySharing()

virtual bool CoherenceProtocol::doesDirtySharing ( )
inlinevirtual

Determine whether the coherence protocol does dirty sharing.

Returns
True if the coherence protocol does dirty sharing

Reimplemented in MOSI, MOESI, and Dragon.

◆ doesWriteNoAllocate()

virtual bool CoherenceProtocol::doesWriteNoAllocate ( )
inlinevirtual

Determine whether the coherence protocol uses write no-allocate.

Returns
True if the coherence protocol uses write no-allocate

Reimplemented in WriteThrough.

◆ isWriteBackNeeded()

virtual bool CoherenceProtocol::isWriteBackNeeded ( state_e  state)
pure virtual

Determine whether a line needs to be written back to main memory.

Parameters
stateThe state of the line
Returns
Whether the line needs to be written back to main memory

Implemented in WriteThrough, MSIUpgr, MSI, MOSI, MOESI, MESI, and Dragon.

◆ PrRd()

virtual void CoherenceProtocol::PrRd ( cache_line line)
pure virtual

Receive a PrRd message.

Parameters
lineThe cache line accessed (non-null)

Implemented in WriteThrough, MSIUpgr, MSI, MOSI, MOESI, MESI, and Dragon.

◆ PrWr()

virtual void CoherenceProtocol::PrWr ( cache_line line)
pure virtual

Receive a PrWr message.

Parameters
lineThe cache line accessed

Implemented in WriteThrough, MSIUpgr, MSI, MOSI, MOESI, MESI, and Dragon.


The documentation for this class was generated from the following file: